LLM Agents Achieve 2.6x Speedup in FPGA Design with Hybrid HLS/RTL Workflow

Architecture & Actionable Implementation

LLM agents can design better chips by leveraging higher-level abstractions. The paper compares four approaches: Direct RTL Design, Agent-based HLS Design, Post-Compiler HLS Refinement, and Post-HLS RTL Refinement. The hybrid approach, Agent-based HLS with RTL Refinement (AHRR), achieves a 2.6x geometric-mean speedup over Direct RTL Design.

Hybrid HLS/RTL Workflow

The hybrid workflow combines Agent-based HLS Design with Post-HLS RTL Refinement. This approach distills design knowledge into abstractions that agents can leverage while recovering lower-level optimization opportunities.

import torch
import torch.nn as nn

class AgentBasedHLS(nn.Module):
    def __init__(self, input_size, hidden_size, output_size):
        super(AgentBasedHLS, self).__init__()
        self.fc1 = nn.Linear(input_size, hidden_size)
        self.fc2 = nn.Linear(hidden_size, output_size)
        
    def forward(self, x):
        x = torch.relu(self.fc1(x))
        x = self.fc2(x)
        return x

class PostHLSTLRefinement(nn.Module):
    def __init__(self, input_size, hidden_size, output_size):
        super(PostHLSTLRefinement, self).__init__()
        self.fc1 = nn.Linear(input_size, hidden_size)
        self.fc2 = nn.Linear(hidden_size, output_size)
        
    def forward(self, x):
        x = torch.relu(self.fc1(x))
        x = self.fc2(x)
        return x

class AHRR(nn.Module):
    def __init__(self, input_size, hidden_size, output_size):
        super(AHRR, self).__init__()
        self.hls = AgentBasedHLS(input_size, hidden_size, output_size)
        self.rtl = PostHLSTLRefinement(input_size, hidden_size, output_size)
        
    def forward(self, x):
        x = self.hls(x)
        x = self.rtl(x)
        return x

Hard Production Trade-Offs (The Cost of Scale)

Latency vs. Throughput

The hybrid workflow achieves a 2.6x geometric-mean speedup over Direct RTL Design. However, the increased complexity of the hybrid workflow can lead to higher latency and lower throughput in some cases.

Unit Economics & TCO

The hybrid workflow requires additional resources for the HLS and RTL refinement stages, which can increase the total cost of ownership. However, the improved design quality and reduced time-to-market can offset these costs.

Failure Domains

The hybrid workflow introduces new failure domains, including abstraction mismatches and optimization conflicts. These issues can lead to design errors and require careful validation and verification.